QUESTION
OUTLINE
ELE2303 – EMBEDDED SYSTEMS DESIGN
ASSIGNMENT 1 – HARDWARE DESIGN
You have been requested by your Senior Engineer to design an Engine Control Unit (ECU) and
prepare a report detailing your proposed solution. The client requires a design for a microcontroller
based control unit for a new engine to be used in passenger vehicles.
You are required to design the hardware for an HC12 based Engine Control Unit, only as a circuit
diagram. There is no actual hardware construction or testing required. This design includes
external memory and bus circuitry, as well as the Input/Output hardware for interfacing with the
engine itself.
You are required to complete this hardware design assessment by submitting your answers to the
following questions in a short report format. Your report should include: a title page, numbering
on each answer, your working for each question and either individual circuit diagrams for
each question, or one large diagram with sections identified for each question.
Do NOT repeat the wording of the questions in your report. Your report is NOT to include copies
of any data sheets.
Drawing of circuit diagrams using CAD IS NOT REQUIRED, but if you have experience with a
suitable CAD package you may use it. Clear hand drawn diagrams are sufficient, but please draw
using a ruler and use ink on the final design so it can be scanned and submitted electronically.
You must draw your own circuits. Do NOT use photocopies, scans or parts of circuits from any
other circuit diagrams, with the exception that the pin outs for individual integrated circuits may be
copied from data sheets or the study materials. You may use cut and paste methods to assemble
components onto A4 or A3 size sheets and link them with clearly drawn circuit connections. (We
suggest you draft in pencil, then do a final in ink)
For the HC12 microcontroller you may use a copy of the block diagram from page 29 or 30, from
of the MC68HC912D60A.pdf technical manual provided on the course CD.
You may only select integrated circuit components from those provided in the course study
materials, particularly:
1. An HC12 D60 microcontroller
2. The 74xxx series of logic devices. (see Appendix D)
3. The 27xx and 6xxx series of memory devices. (see Module 5)
4. The Motorola MCxxxx series of interface devices. RS232 buffers etc.
(see Reading 4.4)
Any discrete components used, such as resistors, capacitors etc, should have their approximate
values specified.
ASSIGNMENT REQUIREMENTS (Specification)
You are required to design and document the hardware design for a 68HC12D60 based Engine
Control Unit (ECU). This design includes the Input/Output hardware for interfacing with the
engine, external memory and bus circuitry as described in questions below.
Assessment Questions
1. Block Diagram (20 marks)
Draw a block diagram of the ECU showing each element of the Engine Interface (see question 6)
and Diagnostic Interface (see question 7), connected to an appropriate I/O port of the HC12. Clearly
label the I/O ports used and the elements of the interfaces. (Eg. The tacho, fuel injector)
2. Microprocessor support (20 marks)
Draw a circuit diagram showing the minimum components needed to correctly operate the HC12
D60 microprocessor in normal expanded narrow mode. (That is – for external memory using an 8
bit data bus) You should ensure that:
(a) power is provided to the HC12 (assume a regulated 5V supply is available)
(b) interrupts are in their inactive condition
(c) the microprocessor E clock operates at 8MHz
(d) a reset circuit is provided.
(e) data and address buffers/latches are used as required.
You must specify part numbers and suggest values for any components used.
3. Memory Decoding (30 marks)
8k EPROM2
4k EPROM1
UNUSED
2k RAM
UNUSED
Internal HC12 I/O
FFFF
E000
D000
8000
87FF
0000
Figure 1. Required Memory Map
Draw a circuit diagram for the address decoding hardware required to decode external memory
attached to the HC12D60 microcontroller, to match the memory map of Figure 1. You must show
how the E clock signal from a HC12 is used in the circuit to enable the decoders at the correct time
in the microprocessor cycle. Clearly identify all ICs used, label all pins on all parts and label the
signals coming to and from the parts.
4. Memory Devices (20 marks)
Draw the circuit diagram for the connections to EPROM1 and the RAM device as defined in
the memory map in question 3. You must show all the connections required to operate the memory
devices. Clearly identify which ICs are used, label all pins on all parts and label the signals coming
to the memory devices.
5. Timing Diagram (30 marks)
Draw a bus timing diagram showing the signals: E clock, address lines, data lines, latched
address, the chip select for the RAM device and any other significant signals you have used in
your circuit. Incorporate delays for decoders, latches and/or bus buffers that match your circuit
design. DO NOT use copied or scanned diagrams from study materials. Draw your own timing
diagrams.
Calculate the maximum read memory access time available for the RAM device drawn for
question 4, using the timing delay values provided on page 420 of the MC68HC912D60A.pdf
technical data manual and timing values for 74 series logic parts given in Appendix D. Assume an
8MHz E clock. Show your calculations.
Identify if the bus timing will function correctly or not. If it will not operate correctly, explain why
it does not and how you would modify the design to ensure correct operation.
6. Engine Interface (30 marks)
Draw a circuit diagram showing how you would connect the Engine Control Unit to the engine
components listed below. That is – show how these signals would be connected to the built-in I/O
ports of the HC12. You should select appropriate ports and pins of the HC12 to match the signal
types to best achieve the functionality required for that signal. (Do not use external I/O devices.)
Each engine component interfaced to the ECU circuit board requires an electrical connector to
physically bring these signals to the PCB (Printed Circuit Board). Show each connector as a
rectangle with numbered pins, clearly showing signal names and a GND reference. Label all pins
on all parts and label the signals used in the circuit.
(a) The tachometer provides a 0 to 2.5 V analogue signal proportional to the speed of the
engine. 0.0 V indicates 0 rpm, 2.5 V is equivalent to 8000rpm.
(b) The digital gear selection sensor is fully CMOS compatible and provides a 3 bit code
indicating the selected gear as: 0 = neutral, 1 to 5 as forward gears, 6 is invalid and 7 as
reverse.
(c) The accelerator position sensor provides a 0 to 5 V analogue output proportional to the
position of the accelerator. The 5 V maximum signal level is provided when the accelerator
is fully depressed.
(d) The Timing Trigger signal from the engine timing system produces a CMOS compatible
active low pulse of 100µS duration.
(e) The Fuel Injector Pulse signal to the engine timing system requires a CMOS compatible
active high pulse whose duration controls the length of the fuel injection period.
7. Diagnostic Interface (30 marks)
Draw a circuit diagram showing a serial port diagnostic interface for the Engine Control Unit
incorporating the elements listed below. That is – show how these signals would be connected to
the built-in I/O ports of the HC12. You should select appropriate ports and pins of the HC12 to
match the signal types to best achieve the functionality required for that signal.
(a) The single indicator LED is required on the ECU to indicate the mode of the ECU. OFF for
normal ‘Operate’ mode and ON for ‘Diagnostic’ mode.
(b) The single momentary push button (active low) input is required to toggle the mode of the
ECU between ‘Operate’ mode and ‘Diagnostic’ mode.
(c) An RS232 compatible interface is required to provide a means to communicate with the
ECU and to download new engine parameters in the form of a table of numbers. The
amount of data downloaded at any time is approximately 2k bytes. This download task is to
take no longer than a few seconds to complete. Show your calculations for the selection
of a suitable BAUD rate.
Use a standard connector and driver/receiver circuitry for use with the RS232 interface.
Clearly identify which ICs are used, label all pins on all parts and label the signals used in the
circuit.
7. Justification of Design (10 marks)
Write a brief justification for your choice of input/output connections to the HC12 that you used in
questions 5 and 6. That is – briefly outline why you selected particular ports and/or pins of the
HC12 to suit the operation of each interface. In particular you should consider how the ECU
software might benefit from the use of interrupts on some connections.
Report format and presentation will be worth (10 marks)
Allocation of marks :
Question
1. Block Diagram 20 marks
2. Microprocessor support 20 marks
3. Memory decoding 30 marks
4. Memory devices 20 marks
5. Bus timing 30 marks
6. Engine Interface 30 marks
7. Diagnostic Interface 30 marks
8. Justification of design 10 marks
Report format and presentation 10 marks
———–
Total 200 marks
Schematic circuit diagrams will be marked by a penalty system:
Less 5 marks per major design error
(a design error that would require significant hardware modifications to correct)
Less 2 marks per minor design error
(a design error that would require simple hardware modifications to correct)
Less 1 marks per circuit diagram error
(not labelling signals, pins etc, unclear or typo’s)
SOLUTION
1.. MICROCONTROLLER CONNECTIONS
According to question number 2-
The microcontroller has connections according to manual of MC68HC912D60A .There is a 8Mz frequency at ECLK by a circuit which has devices according to components given.The R/W(bar) is connected to all memories with ‘Prog’(2764) and ‘WR(bar)’ lines(6116).Thr reset circuit is connected at RESET(bar) pin.Supply is given at VDDX and ground is at pin VSSX.There is a latch 74373 for address and data lines,Input of which are given at memory chips.All chips has Vcc and Gnd connections.
2.MEMORY INTERFACING—
According to the question 3 and 4,the memory map given in question ,when change into binary,the address is of 16 bytes .It means address lines will be Ao to A15.We will use “block decoding” technique to connect memory different memory chips. 8k EPROM is the memory chip 2764 and 2k RAM is the memory chip 6116.Internal HC12I/o is the internal memory of MC68HC912D60A,which is at pin Vfp of 112 pin microcontroller.As there will be 16 data lines so two chips will be used of 2764.And there are 6 position of memory have to be chosen so that (3:8) decoder will be used which is given in components with IC number 74138.The input lines will be address lines that can differentiate among different memory chips.
So on the base of differences [1 1 1,1 0 0 ,0 1 0 ,0 0 1,0 0 0 –(in different memory blocksEPROM1,EPROM2,Unused,RAM,Internal MemoryHC12I/o)]A10,A12 and A13 will be used..And output will be Y7,Y4,Y1 and Y0 which select all memories.
FIGURE-2—MEMORY MAP
A15 | A14 | A13 | A12 | A11 | A10 | A9 | A8 | A7 | A6 | A5 | A4 | A3 | A2 | A1 | A0 | Addr. | MEM. |
1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | FFFF | EPROM2 |
1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | E000 | EPROM2 |
1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | E000 | EPROM1 |
1 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | D000 | EPROM1 |
1 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | D000 | UNUSED |
1 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 87FF | UNUSED |
1 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 87FF | RAM2K |
1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 8000 | RAM2K |
1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 8000 | UNUSED |
0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0000 | INTER. |
FIGURE-3-DECODING CIRCUIT
FIGURE-4-MEMORY DEVICES CIRCUIT
3.TIMING DIAGRAM –
(FIGURE-5)
Justification for question number 5 and 6 –
For question 5—During device is selected,CE(bar) will be active low .Address is valid prior to and during CE(bar) .OE(bar) is active low.As RAM is a storage device data is valid while writing and after next address writing.
4. ENGINE INTERFACE
For question 6—
(a)Analog to digital converter is at pin AN0 to AN7.So signal is directly applid at the pins.
(b)Digital gear selection is of 8 bit so 8:1 ,74151 IC multiplexer can be used and can applied to input/output pin pp7.
(c)Analg to digital converter can be used and distance in the form of voltage can be seen on LED display.
(d)Timing trigger signal is active low and applied with inverter at pin PT1.
(e)Fuel injector pulse signal is active high and can be directly applied to pin PT0.
5.DIGNOSTICS—
According to question 7 ,there is a optoresistor1 and switch SWSPST in components which is used across MODA and MODB (diode has negative side of MODB pin and positive side on MODA pin and they are ‘0’ and ‘1’ in “normal expanded narrow mode”.
RST232 is connected across Rx0 and Tx0 according to its receiving and transmiting pins.
6.BLOCK DIAGRAM—
Block diagram is according to question number1.
NOTE—
1.There are minimum devices used and use of ‘ink’according to question .Mannual of “Motorala version 2003” for MC68Hc(9)12D60A is used.
2. For the calculation of part 7(c),sufficient version of manual is not available.
FIGURE-6-ENGINE CONTROL UNIT(BLOCK DIAGRAM)
A15 | A14 | A13 | A12 | A11 | A10 | A9 | A8 | A7 | A6 | A5 | A4 | A3 | A2 | A1 | A0 | Addr. | MEM. |
1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | FFFF | EPROM2 |
1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | E000 | EPROM2 |
1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | E000 | EPROM1 |
1 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | D000 | EPROM1 |
1 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | D000 | UNUSED |
1 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 87FF | UNUSED |
1 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 87FF | RAM2K |
1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 8000 | RAM2K |
1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 8000 | UNUSED |
0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0000 | INTER. |
JD87
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