Data Representation and Digital Logic : 628424


Question 1


  1. a) A Computer uses IEEE-754 single precision format to represent floating points. What value (in decimal) the computer represents if the floating point is represented using the following binary digits: [6 marks]


0 01111110 10100000000000000000000


  1. b) Using a “word” of 5 bits, list all of the possible signed binary numbers and their decimal equivalents that are represent able in: [3+3+3 = 9 marks]
  2. Signed magnitude
  3. One’s complement

iii.        Two’s complement


Question 2


  1. a) Write a Boolean function and construct a logic diagram of a circuit which use of basic logic gates to activate CSU main entrance door during 9:00 am to 12:00 pm and after lunch time during 1:00 pm – 4:00 pm. You need to use 24 hour clock timing when designing this circuit. [9 marks]


Please insert the Boolean expression, minimisation, and the diagram


  1. b) Using basic Boolean algebra identities for Boolean variables A, B and C, prove that X’Y + XYZ’ + Y’ + XZ (Y+Y’) = 1. Please show all steps and mention the identities used. [6 marks]


Question 1

Section a

The binary digits in the IEEE 754 number system is as shown below,

0 01111110 10100000000000000000000

The IEE 754 is a floating point standard that was defined in 1985. It was developed in response to various representation and the rising need for portability for the scientific code. There are two representations:

  • Single precision IEEE 754 format with 32-bit representation
  • Double precision IEEE 754 format with 64-bit representation

The IEEE 754 format is converted using the following formula,


When S, denotes a sign bit, is 0 – shows that a number is a non-negative and when s=1, it is a negative number. The significand is the fraction that is restored with a single addition. For a single precision, the bias is 127.

0 Positive number
01111110 Exponent
10100000000000000000000 Fraction

Converting the three sections to decimals,

Exponent – 126

Fraction = 0.625

Section b

  • Signed magnitude
First Binary First decimal Last binary Last decimal
+15­10 -15­10


  • One’s complement
First Binary First decimal Last binary Last decimal
-15­10 +15­10
  • Two’s complement
First Binary First decimal Last binary Last decimal
-16­10 +15­10

Question 2

Section a

The truth table showing the circuit input and outputs for a 4 input circuit is as shown below,

The truth table is simplified further to obtain the circuit diagram that is implemented in the door system,

Section b

The variables A, B, & C are denoted as X, Y, Z respectively.

The solution is simplified further using the exclusive OR gate as denoted below,

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